Xilinx MicroBlaze Reference Manual page 263

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muli
Multiply Immediate
rD, rA, IMM
muli
0 1 1 0 0 0
0
6
Description
Multiplies the contents of registers rA and the value IMM, sign-extended to 32 bits; and puts the result
in register rD. This is a 32-bit by 32-bit multiplication that will produce a 64-bit result. The least
significant word of this value is placed in rD. The most significant word is discarded.
Pseudocode
(rD)
LSW( (rA)
Registers Altered
rD
Latency
1 cycle with
3 cycles with
Notes
By default, Type B Instructions will take the 16-bit IMM field value and sign extend it to 32 bits to use
as the immediate operand. This behavior can be overridden by preceding the Type B instruction with
an imm instruction. See the instruction
This instruction is only valid if the target architecture has multiplier primitives, and if present, the
MicroBlaze parameter C_USE_HW_MUL is greater than 0.
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
rD
rA
11
×
sext(IMM) )
=0 or 2
C_AREA_OPTIMIZED
=1
C_AREA_OPTIMIZED
"imm"
www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
IMM
16
for details on using 32-bit immediate values.
31
264
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