Xilinx MicroBlaze Reference Manual page 22

Semaphore Synchronization
The LWX and SWX instructions are used to implement common semaphore operations,
including test and set, compare and swap, exchange memory, and fetch and add. They are
also used to implement spinlocks.
These instructions are typically used by system programs and are called by application
programs as needed.
Generally, a program uses LWX to load a semaphore from memory, causing the reservation
to be set (the processor maintains the reservation internally). The program can compute a
result based on the semaphore value and conditionally store the result back to the same
memory location using the SWX instruction. The conditional store is performed based on
the existence of the reservation established by the preceding LWX instruction. If the
reservation exists when the store is executed, the store is performed and MSR[C] is cleared
to 0. If the reservation does not exist when the store is executed, the target memory
location is not modified and MSR[C] is set to 1.
If the store is successful, the sequence of instructions from the semaphore load to the
semaphore store appear to be executed atomically—no other device modified the
semaphore location between the read and the update. Other devices can read from the
semaphore location during the operation.
For a semaphore operation to work properly, the LWX instruction must be paired with an
SWX instruction, and both must specify identical addresses.
The reservation granularity in MicroBlaze is a word. For both instructions, the address must
be word aligned. No unaligned exceptions are generated for these instructions.
The conditional store is always attempted when a reservation exists, even if the store
address does not match the load address that set the reservation.
Only one reservation can be maintained at a time. The address associated with the
reservation can be changed by executing a subsequent LWX instruction.
The conditional store is performed based upon the reservation established by the last LWX
instruction executed. Executing an SWX instruction always clears a reservation held by the
processor, whether the address matches that established by the LWX or not.
Reset, interrupts, exceptions, and breaks (including the BRK and BRKI instructions) all clear
the reservation.
The following provides general guidelines for using the LWX and SWX instructions:
• The LWX and SWX instructions should be paired and use the same address.
• An unpaired SWX instruction to an arbitrary address can be used to clear any
reservation held by the processor.
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018 www.xilinx.com
Chapter 2: MicroBlaze Architecture
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