Xilinx MicroBlaze Reference Manual page 274

Hide thumbs Also See for MicroBlaze:
Table of Contents

Advertisement

rsubi
Arithmetic Reverse Subtract Immediate
rD, rA, IMM
rsubi
rsubic
rD, rA, IMM
rD, rA, IMM
rsubik
rsubikc
rD, rA, IMM
0 0 1 K C 1
0
6
Description
The contents of register rA is subtracted from the value of IMM, sign-extended to 32 bits, and the
result is placed into register rD. Bit 3 of the instruction (labeled as K in the figure) is set to one for the
mnemonic rsubik. Bit 4 of the instruction (labeled as C in the figure) is set to one for the mnemonic
rsubic. Both bits are set to one for the mnemonic rsubikc.
When an rsubi instruction has bit 3 set (rsubik, rsubikc), the carry flag will Keep its previous value
regardless of the outcome of the execution of the instruction. If bit 3 is cleared (rsubi, rsubic), then the
carry flag will be affected by the execution of the instruction. When bit 4 of the instruction is set to
one (rsubic, rsubikc), the content of the carry flag (MSR[C]) affects the execution of the instruction.
When bit 4 is cleared (rsubi, rsubik), the content of the carry flag does not affect the execution of the
instruction (providing a normal subtraction).
Pseudocode
if C = 0 then
(rD)
sext(IMM) +
else
(rD)
sext(IMM) +
if K = 0 then
MSR[C]
CarryOut
Registers Altered
rD
MSR[C]
Latency
1 cycle
Note
In subtractions, Carry = (Borrow). When the Carry is set by a subtraction, it means that there is no
Borrow, and when the Carry is cleared, it means that there is a Borrow. By default, Type B Instructions
will take the 16-bit IMM field value and sign extend it to 32 bits to use as the immediate operand. This
behavior can be overridden by preceding the Type B instruction with an imm instruction. See the
instruction
"imm"
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
Subtract Immediate
Subtract Immediate with Carry
Subtract Immediate and Keep Carry
Subtract Immediate with Carry and Keep Carry
rD
rA
11
(rA) + 1
(rA)
+ MSR[C]
for details on using 32-bit immediate values.
www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
IMM
16
31
275
Send Feedback

Advertisement

Table of Contents
loading

Table of Contents