Xilinx MicroBlaze Reference Manual page 264

or Logical OR
rD, rA, rB
or
1 0 0 0 0 0
0
6
Description
The contents of register rA are ORed with the contents of register rB; the result is placed into register
rD.
Pseudocode
←
(rD) (rA)
Registers Altered
• rD
Latency
• 1 cycle
Note
The assembler pseudo-instruction nop is implemented as "or r0, r0, r0".
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
rD rA
11
∨
(rB)
www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
rB 0 0 0 0 0 0 0 0 0 0 0
16 21 31
265
Send Feedback