Fault Tolerance - Xilinx MicroBlaze Reference Manual

Fault Tolerance

The fault tolerance features included in MicroBlaze, enabled with
provide Error Detection for internal block RAMs (in the Instruction Cache, Data Cache,
Branch Target Cache, and MMU), and support for Error Detection and Correction (ECC) in
LMB block RAMs. When fault tolerance is enabled, all soft errors in block RAMs are detected
and corrected, which significantly reduces overall failure intensity.
In addition to protecting block RAM, the FPGA configuration memory also generally needs
to be protected. A detailed explanation of this topic, and further references, can be found in
the two documents LogiCore IP Soft Error Mitigation Controller Product Guide (PG036)
[Ref 2] and LogiCore IP UltraScale Architecture Soft Error Mitigation Controller Product Guide
(PG187) [Ref 16].
To further increase fault tolerance, a complete triple modular redundancy (TMR) solution is
provided for MicroBlaze, using additional cores to handle majority voting and fault
detection. See the Triple Modular Redundancy (TMR) Subsystem Product Guide (PG268)
[Ref 7] for a complete description and implementation details.
Configuration
Using MicroBlaze Configuration
You can enable Fault tolerance on the General page of the MicroBlaze configuration dialog
box.
After enabling fault tolerance in MicroBlaze, ECC is automatically enabled in the connected
LMB BRAM Interface Controllers by the tools, when the system is generated. This means
that nothing else needs to be configured to enable fault tolerance and minimal ECC
support.
It is possible (albeit not recommended) to manually override ECC support, leaving the LMB
BRAM unprotected, by disabling
BRAM Interface Controllers.
In this case, the internal MicroBlaze block RAM protection is still enabled, since fault
tolerance is enabled.
Using LMB BRAM Interface Controller Configuration
As an alternative to the method described above, it is also possible to enable ECC in the
configuration dialogs of all connected LMB BRAM Interface Controllers.
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
in the configuration dialogs of all connected LMB
C_ECC
www.xilinx.com
Chapter 2: MicroBlaze Architecture
C_FAULT_TOLERANT
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