Xilinx MicroBlaze Reference Manual page 159

Back-to-Back Write Operation
X-Ref Target - Figure 3-8
Clk
A0
Addr
BE0
Byte_Enable
Data_Write
D0
AS
Read_Strobe
Wirte_Strobe
Data_Read
Ready
Wait
CE
UE
Back-to-Back Read Operation
X-Ref Target - Figure 3-9
Clk
A0
Addr
Byte_Enable
Data_Write
AS
Read_Strobe
Wirte_Strobe
Data_Read
Ready
Wait
CE
UE
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
A1 A2
BE1 BE2
D1 D2
Don't Care Don't Care
Figure 3-8: LMB Back-to-Back Write Operation
A1
D0
Don't Care Don't Care
Figure 3-9: LMB Back-to-Back Read Operation
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Chapter 3: MicroBlaze Signal Interface Description
A3
BE3
D3
Don't Care
A2 A3
D1 D2
A4
BE4
D4
X19792-091217
A4
D3 D4
Don't Care
X19793-091217
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