Xilinx MicroBlaze Reference Manual page 125

Full
This system uses all of the features provided by the LMB BRAM Interface Controller, to
enable full error injection capability, as well as error monitoring and interrupt generation. It
is a typical system with Uncorrectable Error First Failing registers and Fault Injection
registers added. All features are switched on for full control of ECC functionality for system
debug or systems with high fault tolerance requirements. Parameters set are:
= 1
-
C_ECC
-
C_CE_COUNTER_WIDTH
- C_ECC_STATUS_REGISTER
-
C_CE_FAILING_REGISTERS
-
C_UE_FAILING_REGISTERS
- C_FAULT_INJECT
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
= 10
= 1
= 1
= 1
= 1
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Chapter 2: MicroBlaze Architecture
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