Xilinx MicroBlaze Reference Manual page 114

Table 2-59: Profiling Buffer Address Register (PBAR)
Bits Name
n-1:0 Buffer
Address
Profiling Data Read Register
The Profiling Data Read Register (PDRR) reads the bin value indicated by the Profiling Buffer
Address Register and increments the Profiling Buffer Address Register. This register is a read-
only register. Issuing a write request to the register does nothing. See the following figure and
table.
When reading this register with MDM software access to debug registers, data is read with
two consecutive accesses.
X-Ref Target - Figure 2-39
35
Table 2-60: Profiling Data Read Register (PDRR)
Bits Name
35:0 Read Data
Profiling Data Write Register
The Profiling Data Write Register (PDWR) writes a new value to the bin indicated by the
Profiling Buffer Address Register and increments the Profiling Buffer Address Register. This
register is a write-only register. Issuing a read request has no effect, and undefined data is
read.
This register can be used to clear the Profiling Buffer before enabling profiling.
The 4 most significant bits in the Profiling Buffer bin are set to zero when writing the new
value. See the following figure and table.
X-Ref Target - Figure 2-40
31
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
Bin in the Profiling Buffer to read or write. The number of bits (n) is 10
for a 4KB buffer, 11 for a 8KB buffer, ..., 15 for a 128KB buffer.
Read Data
Figure 2-39: Profiling Data Read Register
Number of executed instructions or executed clock cycles in the bin
Write Data
Figure 2-40: Profiling Data Write Register
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Chapter 2: MicroBlaze Architecture
Description
Description
Reset Value
0
0
X19775-082517
Reset Value
0
0
X19776-082517
114
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