Xilinx MicroBlaze Reference Manual page 157

LMB Transactions
The following diagrams provide examples of LMB bus operations.
Generic Write Operations
X-Ref Target - Figure 3-4
Clk
Addr
Byte_Enable
Data_Write
AS
Read_Strobe
Wirte_Strobe
Data_Read
Ready
Wait
CE
UE
X-Ref Target - Figure 3-5
Clk
Addr
Byte_Enable
Data_Write
AS
Read_Strobe
Wirte_Strobe
Data_Read
Ready
Wait
CE
UE
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
A0
BE0
D0
Don't Care
Figure 3-4: LMB Generic Write Operation, 0 Wait States
A0
BE0
D0
Figure 3-5: LMB Generic Write Operation, N Wait State
www.xilinx.com
Chapter 3: MicroBlaze Signal Interface Description
Don't Care
X19788-091217
X19789-091217
158
Send Feedback