Xilinx MicroBlaze Reference Manual page 27

Table 2-9: Machine Status Register (MSR)
Bits Name
0 CC
1:16 Reserved
17 VMS
18 VM
19 UMS
20 UM
21 PVR
22 EIP
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
Arithmetic Carry Copy
Copy of the Arithmetic Carry (bit 29). CC is always the same as bit C.
Virtual Protected Mode Save
Only available when configured with an MMU
(if C_USE_MMU > 1 and C_AREA_OPTIMIZED = 0 or 2)
Read/Write
Virtual Protected Mode
0 = MMU address translation and access protection disabled, with
C_USE_MMU = 3 (Virtual). Access protection disabled with
C_USE_MMU = 2 (Protection)
1 = MMU address translation and access protection enabled, with
C_USE_MMU = 3 (Virtual). Access protection enabled, with
C_USE_MMU = 2 (Protection).
Only available when configured with an MMU
(if C_USE_MMU > 1 and C_AREA_OPTIMIZED = 0 or 2)
Read/Write
User Mode Save
Only available when configured with an MMU
(if C_USE_MMU > 0 and C_AREA_OPTIMIZED = 0 or 2)
Read/Write
User Mode
0 = Privileged Mode, all instructions are allowed
1 = User Mode, certain instructions are not allowed
Only available when configured with an MMU
(if C_USE_MMU > 0 and C_AREA_OPTIMIZED = 0 or 2)
Read/Write
Processor Version Register exists
0 = No Processor Version Register
1 = Processor Version Register exists
Read only
Exception In Progress
0 = No hardware exception in progress
1 = Hardware exception in progress
Only available if configured with exception support
( C_*_EXCEPTION or C_USE_MMU > 0 )
Read/Write
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Chapter 2: MicroBlaze Architecture
Description Reset Value
0
0
0
0
0
Based on
parameter
C_PVR
0
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