Xilinx MicroBlaze Reference Manual page 15

Table 2-6: MicroBlaze Instruction Set Summary (Cont'd)
Type A
Type B
TNCAPUTD Ra,Rb 010011
FADD Rd,Ra,Rb 010110
FRSUB Rd,Ra,Rb 010110
FMUL Rd,Ra,Rb 010110
FDIV Rd,Ra,Rb 010110
FCMP.UN Rd,Ra,Rb 010110
FCMP.LT Rd,Ra,Rb 010110
FCMP.EQ Rd,Ra,Rb 010110
FCMP.LE Rd,Ra,Rb 010110
FCMP.GT Rd,Ra,Rb 010110
FCMP.NE Rd,Ra,Rb 010110
FCMP.GE Rd,Ra,Rb 010110
FLT Rd,Ra 010110
FINT Rd,Ra 010110
FSQRT Rd,Ra 010110
MULI Rd,Ra,Imm 011000
BSRLI Rd,Ra,Imm 011001
BSRAI Rd,Ra,Imm 011001
BSLLI Rd,Ra,Imm 011001
BSEFI Rd,Ra, 011001
Imm ,Imm
W S
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
0-5 6-10 11-15 16-20
0-5 6-10 11-15
00000 Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
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Chapter 2: MicroBlaze Architecture
21-31
16-31
Rb 0N1TA0 FSL Rb[28:31] := Ra (control write)
00000
MSR[C] := FSL_M_Full if N = 1
Rb 00000000000 Rd := Rb+Ra, float
Rb 00010000000 Rd := Rb-Ra, float
Rb 00100000000 Rd := Rb*Ra, float
Rb 00110000000 Rd := Rb/Ra, float
Rb 01000000000 Rd := 1 if (Rb = NaN or Ra = NaN,
float
Rd := 0
Rb 01000010000 Rd := 1 if (Rb < Ra, float
Rd := 0
Rb 01000100000 Rd := 1 if (Rb = Ra, float
Rd := 0
Rb 01000110000 Rd := 1 if (Rb <= Ra, float
Rd := 0
Rb 01001000000 Rd := 1 if (Rb > Ra, float
Rd := 0
Rb 01001010000 Rd := 1 if (Rb != Ra, float
Rd := 0
Rb 01001100000 Rd := 1 if (Rb >= Ra, float
Rd := 0
0 01010000000 Rd := float (Ra)
0 01100000000 Rd := int (Ra)
0 01110000000 Rd := sqrt (Ra)
Imm Rd := Ra * s(Imm)
00000000000 & Rd : = 0 & (Ra >> Imm5)
Imm5
00000010000 & Rd := s(Ra >> Imm5)
Imm5
00000100000 & Rd := (Ra << Imm5) & 0
Imm5
01000 & Rd[0:31-Imm
Imm & 0 & Imm Rd[32-Imm
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Semantics
1
1
1
1
1
) else
1
) else
1
) else
1
) else
1
) else
1
) else
1
) else
1
1
1
] := 0
W
:31] := (Ra >> Imm
W
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)
S
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