Xilinx MicroBlaze Reference Manual page 234

fsqrt Floating-Point Arithmetic Square Root
rD, rA
fsqrt
0 1 0 1 1 0
0
6
Description
Performs a floating-point square root on the value in rA and puts the result in register rD.
Pseudocode
if isDnz(rA) then
←
(rD) 0xFFC00000
←
FSR[DO]
←
ESR[EC]
else if isSigNaN(rA) then
←
(rD) 0xFFC00000
←
FSR[IO]
←
ESR[EC]
else if isQuietNaN(rA) then
←
(rD) 0xFFC00000
else if (rA) < 0 then
←
(rD) 0xFFC00000
←
FSR[IO]
←
ESR[EC]
else if (rA) = -0 then
←
(rD) -0
else
←
(rD) sqrt ((rA))
Registers Altered
• rD, unless an FP exception is generated, in which case the register is unchanged
• ESR[EC], if an FP exception is generated
• FSR[IO,DO]
Latency
• 27 cycles with
• 29 cycles with
• 23 cycles with
Note
This instruction is only available when the MicroBlaze parameter C_USE_FPU is set to 2 (Extended).
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
Square Root
rD rA
11
1
00110
1
00110
1
00110
=0
C_AREA_OPTIMIZED
=1
C_AREA_OPTIMIZED
=2
C_AREA_OPTIMIZED
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Chapter 5: MicroBlaze Instruction Set Architecture
0 0 0 0 0
0 1 1 1 0 0 0 0 0 0 0
16 21 31
235
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