Xilinx MicroBlaze Reference Manual page 10

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Table 2-1: Configurable Feature Overview by MicroBlaze Version (Cont'd)
Feature
Lockstep support
Configurable use of FPGA
primitives
Low-latency interrupt mode
Swap instructions
Sleep mode and sleep instruction
Relocatable base vectors
ACE (M_ACE_DC) protocol for D-
Cache
ACE (M_ACE_IC) protocol for I-
Cache
Extended debug: performance
monitoring, program trace, non-
intrusive profiling
Reset mode: enter sleep or debug
halt at reset
Extended debug: external program
trace
Extended data addressing
Pipeline pause functionality
Hibernate and suspend instructions
Non-secure mode
2
Bit field instructions
Parallel debug interface
MMU Physical Address Extension
1. Used for saving DSP48E primitives.
2. Bit field instructions are available when C_USE_BARREL = 1.
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
MicroBlaze versions
v9.2
v9.3
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www.xilinx.com
Chapter 2: MicroBlaze Architecture
v9.4
v9.5
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v9.6
v10.0
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