Xilinx MicroBlaze Reference Manual page 156

Data_Read[0:31]
The read data bus is an input to the core and contains data read from memory.
is valid on the rising edge of the clock when Ready is high.
Ready
The signal is an input to the core and indicates completion of the current transfer
Ready
and that the next transfer can begin in the following clock cycle. It is sampled on the rising
edge of the clock. For reads, this signal indicates the
writes it indicates that the
Wait
The signal is an input to the core and indicates that the current transfer has been
Wait
accepted, but not yet completed. It is sampled on the rising edge of the clock.
CE
The signal is an input to the core and indicates that the current transfer had a correctable
CE
error. It is valid on the rising edge of the clock when Ready is high. For reads, this signal
indicates that an error has been corrected on the
halfword writes it indicates that the corresponding data word in local memory has been
corrected before writing the new data.
UE
The signal is an input to the core and indicates that the current transfer had an
UE
uncorrectable error. It is valid on the rising edge of the clock when Ready is high. For reads,
this signal indicates that the value of the
and halfword writes it indicates that the corresponding data word in local memory was
erroneous before writing the new data.
Clk
All operations on the LMB are synchronous to the MicroBlaze core clock.
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
Chapter 3: MicroBlaze Signal Interface Description
bus has been written to local memory.
Data_Write[0:31]
Data_Read[0:31]
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bus is valid, and for
Data_Read[0:31]
bus, and for byte and
Data_Read[0:31]
bus is erroneous, and for byte
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Data_Read
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