Xilinx MicroBlaze Reference Manual page 19

Table 2-6: MicroBlaze Instruction Set Summary (Cont'd)
Type A
Type B
BRK Rd,Rb 100110
BEQ Ra,Rb 100111
BNE Ra,Rb 100111
BLT Ra,Rb 100111
BLE Ra,Rb 100111
BGT Ra,Rb 100111
BGE Ra,Rb 100111
BEQD Ra,Rb 100111
BNED Ra,Rb 100111
BLTD Ra,Rb 100111
BLED Ra,Rb 100111
BGTD Ra,Rb 100111
BGED Ra,Rb 100111
ORI Rd,Ra,Imm 101000
ANDI Rd,Ra,Imm 101001
XORI Rd,Ra,Imm 101010
ANDNI Rd,Ra,Imm 101011
IMM Imm 101100
RTSD Ra,Imm 101101
RTID Ra,Imm 101101
RTBD Ra,Imm 101101
RTED Ra,Imm 101101
BRI Imm 101110
MBAR Imm 101110
BRID Imm 101110
BRLID Rd,Imm 101110
BRAI Imm 101110
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
0-5 6-10 11-15 16-20
0-5 6-10 11-15
Rd 01100
00000 Ra
00001 Ra
00010 Ra
00011 Ra
00100 Ra
00101 Ra
10000 Ra
10001 Ra
10010 Ra
10011 Ra
10100 Ra
10101 Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
00000 00000
10000 Ra
10001 Ra
10010 Ra
10100 Ra
00000 00000
Imm 00010
00000 10000
Rd 10100
00000 01000
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Chapter 2: MicroBlaze Architecture
21-31
16-31
Rb 00000000000 PC := Rb
Rd := PC
MSR[BIP] := 1
Rb 00000000000 PC := PC + Rb if Ra = 0
Rb 00000000000 PC := PC + Rb if Ra != 0
Rb 00000000000 PC := PC + Rb if Ra < 0
Rb 00000000000 PC := PC + Rb if Ra <= 0
Rb 00000000000 PC := PC + Rb if Ra > 0
Rb 00000000000 PC := PC + Rb if Ra >= 0
Rb 00000000000 PC := PC + Rb if Ra = 0
Rb 00000000000 PC := PC + Rb if Ra != 0
Rb 00000000000 PC := PC + Rb if Ra < 0
Rb 00000000000 PC := PC + Rb if Ra <= 0
Rb 00000000000 PC := PC + Rb if Ra > 0
Rb 00000000000 PC := PC + Rb if Ra >= 0
Imm Rd := Ra or s(Imm)
Imm Rd := Ra and s(Imm)
Imm Rd := Ra xor s(Imm)
Imm Rd := Ra and s(Imm)
Imm Imm[0:15] := Imm
Imm PC := Ra + s(Imm)
Imm PC := Ra + s(Imm)
MSR[IE] := 1
Imm PC := Ra + s(Imm)
MSR[BIP] := 0
Imm PC := Ra + s(Imm)
MSR[EE] := 1, MSR[EIP] := 0
ESR := 0
Imm PC := PC + s(Imm)
0000000000000100 PC := PC + 4; Wait for memory
accesses.
Imm PC := PC + s(Imm)
Imm PC := PC + s(Imm)
Rd := PC
Imm PC := s(Imm)
Semantics
19
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