Xilinx MicroBlaze Reference Manual page 16

Table 2-6: MicroBlaze Instruction Set Summary (Cont'd)
Type A
Type B
BSIFI Rd,Ra, 011001
Width,Imm
S
TNEAGET Rd,FSLx 011011
TNAPUT Ra,FSLx 011011
TNECAGET Rd,FSLx 011011
TNCAPUT Ra,FSLx 011011
OR Rd,Ra,Rb 100000
PCMPBF Rd,Ra,Rb 100000
AND Rd,Ra,Rb 100001
XOR Rd,Ra,Rb 100010
PCMPEQ Rd,Ra,Rb 100010
ANDN Rd,Ra,Rb 100011
PCMPNE Rd,Ra,Rb 100011
SRA Rd,Ra 100100
SRC Rd,Ra 100100
SRL Rd,Ra 100100
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
0-5 6-10 11-15 16-20
0-5 6-10 11-15
Rd Ra
Rd 00000
00000 Ra
Rd 00000
00000 Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
Rd Ra
www.xilinx.com
Chapter 2: MicroBlaze Architecture
21-31
16-31
10000 & M := (0xffffffff << (Imm
Imm & 0 & Imm (0xffffffff << Imm
W S
Rd := ((Ra << Imm
(Rd and M)
Imm
0N0TAE000000 & Rd := FSLx (data read, blocking if
FSLx N = 0)
MSR[FSL] := 1 if (FSLx_S_Control = 1)
MSR[C] := not FSLx_S_Exists if N = 1
1N0TA0000000 & FSLx := Ra (data write, block if N = 0)
FSLx
MSR[C] := FSLx_M_Full if N = 1
0N1TAE000000 & Rd := FSLx (control read, block if N =
FSLx 0)
MSR[FSL] := 1 if (FSLx_S_Control = 0)
MSR[C] := not FSLx_S_Exists if N = 1
1N1TA0000000 & FSLx := Ra (control write, block if N =
FSLx 0)
MSR[C] := FSLx_M_Full if N = 1
Rb 00000000000 Rd := Ra or Rb
Rb 10000000000 Rd := 1 if (Rb[0:7] = Ra[0:7]) else
Rd := 2 if (Rb[8:15] = Ra[8:15]) else
Rd := 3 if (Rb[16:23] = Ra[16:23]) else
Rd := 4 if (Rb[24:31] = Ra[24:31]) else
Rd := 0
Rb 00000000000 Rd := Ra and Rb
Rb 00000000000 Rd := Ra xor Rb
Rb 10000000000 Rd := 1 if (Rb = Ra) else
Rd := 0
Rb 00000000000 Rd := Ra and Rb
Rb 10000000000 Rd := 1 if (Rb != Ra) else
Rd := 0
0000000000000001 Rd := s(Ra >> 1)
C := Ra[31]
0000000000100001 Rd := C & (Ra >> 1)
C := Ra[31]
0000000001000001 Rd := 0 & (Ra >> 1)
C := Ra[31]
Semantics
+ 1)) xor
W
)
S
) and M) xor
S
:= Imm + Width - 1
W S
Send Feedback
16