Reset, Interrupts, Exceptions, And Break - Xilinx MicroBlaze Reference Manual

Reset, Interrupts, Exceptions, and Break

MicroBlaze supports reset, interrupt, user exception, break, and hardware exceptions. The
following section describes the execution flow associated with each of these events.
The relative priority starting with the highest is:
1. Reset
2. Hardware Exception
3. Non-maskable Break
4. Break
5. Interrupt
6. User Vector (Exception)
Table 2-39 defines the memory address locations of the associated vectors and the
hardware enforced register file locations for return addresses. Each vector allocates two
addresses to allow full address range branching (requires an
instruction). Normally the vectors start at address 0x00000000, but the parameter
C_BASE_VECTORS
The address range 0x28 to 0x4F is reserved for future software support by Xilinx. Allocating
these addresses for user applications is likely to conflict with future releases of SDK support
software.
Table 2-39: Vectors and Return Address Register File Location
Event
Reset
User Vector (Exception)
1
Interrupt
Break: Non-maskable
hardware
Break: Hardware
Break: Software
Hardware Exception
Reserved by Xilinx for future
use
1. With low-latency interrupt mode, the vector address is supplied by the Interrupt Controller.
All of these events will clear the reservation bit, used together with the LWX and SWX
instructions to implement mutual exclusion, such as semaphores and spinlocks.
MicroBlaze Processor Reference Guide
UG984 (v2018.2) June 21, 2018
can be used to locate them anywhere in memory.
C_BASE_VECTORS + 0x00000000 -
C_BASE_VECTORS + 0x00000004
C_BASE_VECTORS + 0x00000008 -
C_BASE_VECTORS + 0x0000000C
C_BASE_VECTORS + 0x00000010 -
C_BASE_VECTORS + 0x00000014
C_BASE_VECTORS + 0x00000018 -
C_BASE_VECTORS + 0x0000001C
C_BASE_VECTORS + 0x00000020 -
C_BASE_VECTORS + 0x00000024
C_BASE_VECTORS + 0x00000028 -
C_BASE_VECTORS + 0x0000004F
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Chapter 2: MicroBlaze Architecture
followed by a
IMM
Vector Address
BRAI
Register File
Return Address
-
Rx
R14
R16
R17 or BTR
-
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