Operation In Power-Down Modes - Renesas H8 Series Hardware Manual

8-bit single-chip microcomputer
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Table 13.3 Output Levels
Data
M
Static
Common output
Segment output
1/2 duty
Common output
Segment output
1/3 duty
Common output
Segment output
1/4 duty
Common output
Segment output
13.3.3

Operation in Power-Down Modes

This LSI the LCD controller/driver can be operated even in the power-down modes. The
operating state of the LCD controller/driver in the power-down modes is summarized in table
13.4.
In subactive mode, watch mode, and subsleep mode, the system clock oscillator stops, and
therefore, unless φw, φw/2, or φw/4 has been selected by bits CKS3 to CKS0, the clock will not be
supplied and display will halt. Since there is a possibility that a direct current will be applied to
the LCD panel in this case, it is essential to ensure that φw, φw/2, or φw/4 is selected. In active
(medium-speed) mode, the system clock is switched, and therefore CKS3 to CKS0 must be
modified to ensure that the frame frequency does not change.
0
0
0
1
V
V
1
SS
V
V
1
SS
V
, V
V
, V
2
3
2
3
V
V
1
SS
V
V
3
2
V
V
2
3
V
V
3
2
V
V
2
3
Rev. 7.00 Mar 10, 2005 page 433 of 652
Section 13 LCD Controller/Driver
1
1
0
1
V
V
1
SS
V
V
SS
1
V
V
1
SS
V
V
SS
1
V
V
1
SS
V
V
SS
1
V
V
1
SS
V
V
SS
1
M: LCD alternation signal
REJ09B0042-0700

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