Precautions At Using Dtp/External Interrupt Circuit; Fig. 16.10 Clearing Factor Hold Circuit When Level Set; Fig. 16.11 Dtp/External Interrupt Factor And Interrupt Request Issued When Interrupt Request Output Enabled - Fujitsu MB90420/5 (A) Series Hardware Manual

MB90420/5 (A) SERIES F

16.6 Precautions at Using DTP/External Interrupt Circuit

The precautions regarding the input signal of the DTP/external interrupt circuit, cancellation of the standby
mode, and interrupts are given.
n Precautions at using DTP/external interrupt circuit
• Condition of external-connected peripheral unit when DTP function is used
An external peripheral unit that can be supported by the DTP function must be able to clear requests
automatically at data transfer. Unless a transfer request is delayed within 3 machine clocks after the start
of transfer, DTP/external interrupt circuit recognizes it as the next transfer request.
• External interrupt input polarity
– A minimum of three machine clocks are needed for the pulse width to detect that edges are detected
when the edge mode is set as the interrupt request level setting register (ELVR).
– When a level that becomes the interrupt factor is input when the setting is level detection, the factor FF
in the DTP/interrupt factor register (EIRR) is set to 1 and the factor is held as shown in Figure 16.10.
Consequently, even when the factor is cancelled, the request issued to the interrupt controller remains
active if the interrupt request output is already enabled. To cancel the request issued to the interrupt
controller, clear the external interrupt request flag bit and clear the factor FF as shown in Figure 16.11.
DTP/External
interrupt factor
DTP/External interrupt factor
(when H level detected)
Interrupt request issued to
interrupt controller
Fig. 16.11 DTP/External Interrupt Factor and Interrupt Request Issued
2
MC-16LX FAMILY 16-BIT MICROCONTROLLERS HARDWARE MANUAL
DTP/Interrupt
input detector
The factor remains held unless cleared.

Fig. 16.10 Clearing Factor Hold Circuit when Level Set

Cancellation of interrupt factor
when Interrupt Request Output Enabled
Factor FF
(EIRR register)
The interrupt request is inactived by clearing the factor FF.
16-16
Enable
To interrupt controller
gate (interrupt request)