Processor Mode - Renesas M16C/26A Series Hardware Manual

16-bit single-chip microcomputer m16c family / m16c/tiny series
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6. Processor Mode

The microcomputer supports single-chip mode only. Figures 6.1 and 6.2 show the associated registers.
Processor Mode Register 0
b7
b6
b5
b4
b3
0
0
0 0
NOTES:
1. Rewrite the PM0 register after the PRC1 bit in the PRCR register is set to "1" (write enable).
Processor Mode Register 1
b7
b6
b5
b4
b3
0
0 0
1
NOTES:
1. Rewrite the PM1 register after the PRC1 bit in the PRCR register is set to "1" (write enable).
2. To access the two 2K-byte data spaces in data block A and data block B, set the PM10 bit to "1". The PM10
bit is not available in mask version.
3. When the FMR01 bit in the FMR0 register is set to "1" (enables CPU rewrite mode), the PM10 bit is
automatically set to "1".
4. Set the PM12 bit to "1" by program. (Writing "0" by program has no effect)
5. When the PM17 bit is set to "1" (wait state), one wait is inserted when accessing the internal RAM or the
internal ROM.
Figure 6.1 PM0 Register, PM1 Register
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
C
2 /
6
, A
M
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C
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6
, B
M
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6
(1)
b2
b1
b0
Symbol
0
0 0
PM0
Bit Symbol
Reserved bit
(b2-b0)
PM03
Software reset bit
Reserved bit
(b7-b4)
(1)
b2
b1
b0
Symbol
0
PM1
Bit Symbol
Flash data block access
PM10
bit
Reserved bit
(b1)
Watchdog timer function
PM12
select bit
Reserved bit
(b3)
Reserved bit
(b6-b4)
PM17
Wait bit
page 35
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Address
After Reset
0004
00
16
16
Bit Name
Set to "0"
The microcomputer is reset when
this bit is set to "1". When read,
its content is "0".
Set to "0"
Address
After Reset
0005
00001000
16
Bit Name
0: Disabled
(2)
1: Enabled
Set to "0"
0 : Watchdog timer interrupt
1 : Watchdog timer reset
Set to "1"
Set to "0"
0 : No wait state
(5)
1 : Wait state (1 wait)
6. Processor Mode
Function
2
Function
(3)
(4)
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW

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