Fsi Memory Cycle (Lpc-Spi Command Transfer) - Renesas H8S/2100 Series Hardware Manual

16-bit single-chip microcomputer
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Section 21 FSI Interface
21.4.5

FSI Memory Cycle (LPC-SPI Command Transfer)

The FSI supports instructions other than Byte/Page-Program instructions, AAI-Program
instruction, Read instruction, and Fast-Read instruction by using an LPC-SPI command transfer.
(1)
FSI Command Space
Specific host address space can be used as FSI command space according to the CMDHBAR
settings. Figure 21.11 shows an example of FSI command space settings.
CMDHBAR: H'EFFF
H'EFFF_0000
H'EFFF_F000
H'EFFF_F00F
H'EFFF_FFFF
Note:
The upper 16 bits of the host address are set to the value in the CMDHBAR register.
*
Figure 21.11 FSI Command Space Settings (Example)
As shown in figure 21.11, a host address ranging from H'EFFF_F000 to H'EFFF_F00F is used as
the FSI command space while the CMDHBAR register is set to H'EFFF.
Rev. 1.00 Apr. 28, 2008 Page 714 of 994
REJ09B0452-0100
CMD0
CMD1
CMDE
CMDF
Host addresses
CMD0
CMD1
CMDE
CMDF
FSI command area

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