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9.3.1
PWMX (D/A) Counter (DACNT)
DACNT is a 14-bit readable/writable up-counter. The input clock is selected by the clock select
bit (CKS) in DACR. DACNT functions as the time base for both PWMX (D/A) channels. When a
channel operates with 14-bit precision, it uses all DACNT bits. When a channel operates with 12-
bit precision, it uses the lower 12 bits and ignores the upper 2-bit counter. As DACNT is 16 bits,
data transfer between the CPU is performed through the temporary register (TEMP). For details,
see section 9.4, Bus Master Interface.
Bit (CPU):
15
14
Bit (counter):
7
6
• DACNTH
Bit
Bit Name
7 to 0
DACNT7 to
DACNT0
• DACNTL
Bit
Bit Name
7 to 2
DACNT 8 to
DACNT 13
1
0
REGS
DACNTH
13
12
11
10
5
4
3
2
Initial
Value
R/W
Description
All 0
R/W
Upper Up-Counter
Initial
Value
R/W
Description
All 0
R/W
Lower Up-Counter
1
R
Reserved
Always read as 1 and cannot be modified.
1
R/W
Register Select
DADRA and DACR, and DADRB and DACNT, are
located at the same addresses. The REGS bit specifies
which registers can be accessed.
0: DADRA and DADRB can be accessed
1: DACR and DACNT can be accessed
Section 9 14-Bit PWM Timer (PWMX)
9
8
7
6
1
0
8
9
Rev. 1.00 Apr. 28, 2008 Page 221 of 994
DACNTL
5
4
3
2
10
11
12
13
REJ09B0452-0100
1
0
REGS
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