Tdp Interrupt Enable Register (Tdpier) - Renesas H8S/2100 Series Hardware Manual

16-bit single-chip microcomputer
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12.3.11 TDP Interrupt Enable Register (TDPIER)

TDPIER enables or disables interrupt requests and controls whether to enable or disable external
event input.
Bit
Bit Name
7
OVIE
6
TWDMXIE
5
TWDMNIE
4
TPDMXIE
3
ICPIE
2
CMIE
Initial
Value R/W
Description
0
R/W
Counter Overflow Interrupt Enable
Enables or disables the issuing of OVF interrupt requests
when the OVF flag in TDPCSR is set to 1.
0: OVF interrupt requests are disabled
1: OVF interrupt requests are enabled
0
R/W
Pulse Width Upper Limit Overflow Interrupt Enable
Enables or disables the issuing of TWDMXOVF interrupt
requests when the TWDMXOVF flag in TDPCSR is set to 1.
0: TWDMXOVF interrupt requests are disabled
1: TWDMXOVF interrupt requests are enabled
0
R/W
Pulse Width Lower Limit Underflow Interrupt Enable
Enables or disables the issuing of TWDMNUDF interrupt
requests when the TWDMNUDF flag in TDPCSR is set to 1.
0: TWDMNUDF interrupt requests are disabled
1: TWDMNUDF interrupt requests are enabled
0
R/W
Cycle Upper Limit Overflow Interrupt Enable
Enables or disables the issuing of TPDMXOVF interrupt
requests when the TPDMXOVF flag in TDPCSR is set to 1.
0: TPDMXOVF interrupt requests are disabled
1: TPDMXOVF interrupt requests are enabled
0
R/W
Input Capture Interrupt Enable
Enables or disables the issuing of ICPF interrupt requests
when the ICPF flag in TDPCSR is set to 1.
0: ICPF interrupt requests are disabled
1: ICPF interrupt requests are enabled
0
R/W
Compare Match Interrupt Enable
Enables or disables the issuing of CMF interrupt requests
when the CMF flag in TDPCSR is set to 1.
0: CMF interrupt requests are disabled
1: CMF interrupt requests are enabled
Section 12 16-Bit Duty Period Measurement Timer (TDP)
Rev. 1.00 Apr. 28, 2008 Page 341 of 994
REJ09B0452-0100

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