Section 24 Flash Memory; Features - Renesas H8S/2100 Series Hardware Manual

The flash memory has the following features. Figure 24.1 is a block diagram of the flash memory.
24.1

Features

• Size
Product Classification
H8S/2117R R4F2117R
• Programming/erasing interface by the download of on-chip program
This LSI has a programming/erasing program. After downloading this program to the on-chip
RAM, programming/erasing can be performed by setting the parameters.
• Programming/erasing time
Programming time: 1 ms (typ) for 128-byte simultaneous programming, 7.8 µs per byte
Erasing time: 600 ms (typ) per 1 block (64 kbytes)
• Number of programming
The number of programming can be up to 100 times at the minimum. (1 to 100 times are
guaranteed.)
• Two on-board programming modes
Boot mode: Using the on-chip SCI-1, the user MAT can be programmed/erased. In boot mode,
the bit rate between the host and this LSI can be adjusted automatically.
User program mode: Using a desired interface, the user MAT can be programmed/erased.
• Off-board programming mode
Programmer mode: Using a PROM programmer, the user MAT can be programmed/erased.
• Programming/erasing protection
Protection against programming/erasing of the flash memory can be set by hardware
protection, software protection, or error protection.

Section 24 Flash Memory

ROM Size
160 kbytes
ROM Address
H'000000 to H'027FFF (mode 2)
Rev. 1.00 Apr. 28, 2008 Page 749 of 994
Section 24 Flash Memory
REJ09B0452-0100