Register Descriptions - Renesas H8S/2100 Series Hardware Manual

7.1

Register Descriptions

Table 7.2 lists each port registers.
Table 7.2 Register Configuration in Each Port
Number
Port of Pins DDR
Port 1 8 O
Port 2 8 O
Port 3 8 O
Port 4 8 O
Port 5 3 O
Port 6 8 O

Port 7 8
Port 8 7 O
Port 9 8 O
Port A 8 O
Port B 8 O
Port C 8 O
Port D 8 O

Port E 5
Port F 8 O
Port G 8 O
Port H 6 O
1
Port I 8* O
1
Port J 8* O
[Legend]
O: Register exists
: No register exists
Notes: 1. Not supported by TFP-144V and TLP-145V.
2. Valid only when the PORTS bit in the port control register 2 (PTCNT2) is 1.
DR PIN PCR KMPCR ODR NCE
2
O O* O
2
O O* O
2
O O* O
2

O O*
2

O O*
2

O O*
 
O
2

O O*
2
O O* O
 
O
2

O O*
2

O O*
2

O O*
 
O
2

O O*
 
O
2

O O*
 
O

O O
Registers
  
  
  
  
  

O O
  
  
  
 
O
 
O

O O
 
O
  
 
O

O O
 
O
 
O
 
O
Rev. 1.00 Apr. 28, 2008 Page 143 of 994
Section 7 I/O Ports
NCMC NCCS NOCR
  
  
  
  
  

O O
  
  
  
  
  
O O O
 
O
  
 
O
O O O
 
O
 
O
 
O
REJ09B0452-0100