Pwm Prescaler Registers 0 To 5 (Pwmpre0 To Pwmpre5) - Renesas H8S/2100 Series Hardware Manual

8.3.5

PWM Prescaler Registers 0 to 5 (PWMPRE0 to PWMPRE5)

PWMPRE are 8-bit readable/writable registers used to set the PWM cycle. The initial value is
H'00.
When the PWMPRE value is n, the PWM cycle is calculated as follows.
(1) 8-Bit Single Pulse Mode
PWM cycle = [255 × (n + 1)] / internal clock frequency (0 ≤ n ≤ 255)
Table 8.3 Resolution, PWM Conversion Period, and Carrier Frequency (8-Bit Counter
Operation) when φ = 20 MHz
Internal Clock
Frequency Resolution
φ
50 ns
φ/2
100 ns
φ/4
200 ns
φ/8
400 ns
PWM Conversion Period
Min. Max.
12.8 µs
3.3 ms
25.5 µs
6.5 ms
51.2 µs
13.1 ms
102 µs
26.1 ms
Section 8 8-Bit PWM Timer (PWMU)
Carrier Frequency
Single Pulse Mode
Min.
306.4 Hz
153.2 Hz
76.6 Hz
38.3 Hz
Rev. 1.00 Apr. 28, 2008 Page 207 of 994
REJ09B0452-0100
Max.
78.4 kHz
39.2 kHz
19.6 kHz
9.8 kHz