Operation; Baud Rate - Renesas H8S/2100 Series Hardware Manual

Section 17 Serial Communication Interface with FIFO (SCIF)
17.4

Operation

17.4.1

Baud Rate

The SCIF includes a baud rate generator and can set the desired baud rate using registers FDLH,
FDLL, and the CKSEL bit in SCIFCR. Table 17.6 shows an example of baud rate settings.
Table 17.6 Example of Baud Rate Settings
CKSEL1,
CKSEL0 (33 MHz) divided by 18
FDLH, FDLL
Baud rate (Hex)
50 0900
75 0600
110 0417
300 0180
600 00C0
1200 0060
1800 0040
2400 0030
4800 0018
9600 000C
14400 0008
19200 0006
38400 0003
57600 0002
115200 0001
Rev. 1.00 Apr. 28, 2008 Page 514 of 994
REJ09B0452-0100
00
LCLK
(20 MHz) divided by 11
FDLH, FDLL
Error (%) (Hex)
0.54 % 0900
0.54 % 0600
0.54 % 0417
0.54 % 0180
0.54 % 00C0
0.54 % 0060
0.54 % 0040
0.54 % 0030
0.54 % 0018
0.54 % 000C
0.54 % 0008
0.54 % 0006
0.54 % 0003
0.54 % 0002
0.54 % 0001
01
System Clock
Error (%)
1.36 %
1.36 %
1.36 %
1.36 %
1.36 %
1.36 %
1.36 %
1.36 %
1.36 %
1.36 %
1.36 %
1.36 %
1.36 %
1.36 %
1.36 %
01
System Clock
(10 MHz) divided by 11
FDLH, FDLL
(Hex) Error (%)
0480 1.36 %
0300 1.36 %
 
00C0 1.36 %
0060 1.36 %
0030 1.36 %
0020 1.36 %
0018 1.36 %
000C 1.36 %
0006 1.36 %
0004 1.36 %
0003 1.36 %
 
0001 1.36 %
 