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Section 28 Electrical Characteristics
28.3.1
Clock Timing
Table 28.5 shows the clock timing. The clock timing specified here covers clock output (φ) and
clock pulse generator (crystal) and external clock input (EXTAL pin) oscillation stabilization
times. For details of external clock input (EXTAL pin and EXCL pin) timing, see section 25,
Clock Pulse Generator.
Table 28.5 Clock Timing
Condition A:
V
= 3.0 V to 3.6 V, V
CC
Condition B:
V
= 3.0 V to 3.6 V, V
CC
Item
Clock cycle time
Clock high pulse width
Clock low pulse width
Clock rise time
Clock fall time
Reset oscillation stabilization (crystal)
Software standby oscillation
stabilization time (crystal)
External clock output stabilization delay
time
Rev. 1.00 Apr. 28, 2008 Page 964 of 994
REJ09B0452-0100
= 0 V, φ = 8 MHz to 10 MHz
SS
= 0 V, φ = 10 MHz to 20 MHz
SS
Symbol
Min.
t
100
cyc
t
30
CH
t
30
CL
t
Cr
t
Cf
t
20
OSC1
t
8
OSC2
t
500
DEXT
t
CH
φ
Figure 28.4 System Clock Timing
Condition A
Condition B
Max.
Min.
125
50
20
20
20
20
20
8
500
t
cyc
t
Cf
t
t
Cr
CL
Max.
Unit
Reference
100
ns
Figure 28.4
5
5
ms
Figure 28.5
Figure 28.6
µs
Figure 28.5
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