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2.7.9
Effective Address Calculation
Table 2.13 indicates how effective addresses are calculated in each addressing mode. In normal
mode the upper 8 bits of the effective address are ignored in order to generate a 16-bit address.
Note: Normal mode is not available in this LSI.
Table 2.13 Effective Address Calculation (1)
Addressing Mode and Instruction Format
Register direct(Rn)
Register indirect(@ERn)
Register indirect with post-increment or
pre-decrement
•Register indirect with post-increment @ERn+
•Register indirect with pre-decrement @-ERn
Effective Address Calculation
General register contents
General register contents
Sign extension
General register contents
1, 2, or 4
General register contents
1, 2, or 4
Operand Size
Byte
Word
Longword
Effective Address (EA)
Operand is general register contents.
Rev. 1.00 Apr. 28, 2008 Page 61 of 994
REJ09B0452-0100
Section 2 CPU
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