Pwm Control Register A (Pwmcona); Pwm Control Register B (Pwmconb) - Renesas H8S/2100 Series Hardware Manual

Section 8 8-Bit PWM Timer (PWMU)
8.3.1

PWM Control Register A (PWMCONA)

PWMCONA selects the PWM clock source.
Bit Bit Name
7, 6 CLK1, CLK0 All 0
5 to 0 –
8.3.2

PWM Control Register B (PWMCONB)

PWMCONB controls enabling and disabling of the PWM output and counter operation of each
channel.
Bit Bit Name

7, 6
5 PWM5E
Rev. 1.00 Apr. 28, 2008 Page 202 of 994
REJ09B0452-0100
Initial
Value R/W
R/W
All 0 R
Initial
Value R/W
All 0 R/W
0 R/W
Description
Clock Select 1, 0
These bits select the PWM count clock source.
CLK1 CLK0
0: Internal clock φ is selected
0
1: Internal clock φ/2 is selected
0
0: Internal clock φ/4 is selected
1
1: Internal clock φ/8 is selected
1
Reserved
These bits are always read as 0 and cannot be
modified.
Description
Reserved
The initial value should not be changed.
PWMU5 Output Enable
0: PWMU5 output and counter operation are
disabled.
1: PWMU5 output and counter operation are
enabled.