Operation - Renesas H8S/2100 Series Hardware Manual

9.5

Operation

A PWM waveform like the one shown in figure 9.3 is output from the PWMX pin. DA13 to DA0
in DADR corresponds to the total width (T
(256 pulses when CFS = 0, 64 pulses when CFS = 1). When OS = 0, this waveform is directly
output. When OS = 1, the output waveform is inverted, and DA13 to DA0 in DADR value
corresponds to the total width (T
types of waveform output available.
t
f
Base cycle
(T × 64 or T × 256)
t
L
Table 9.5 summarizes the relationships between the CKS and CFS bit settings and the resolution,
base cycle, and conversion cycle. The PWM output remains fixed unless DA13 to DA0 in DADR
contain at least a certain minimum value. The relationship between the OS bit and the output
waveform is shown in figures 9.4 and 9.5.
) of the low (0) pulses output in one conversion cycle
L
) of the high (1) output pulses. Figures 9.4 and 9.5 show the
H
1 conversion cycle
(T × 2
14
(= 16384))
Figure 9.3 PWMX (D/A) Operation
Section 9 14-Bit PWM Timer (PWMX)
T: Resolution
m
= Σ t
T (OS = 0)
L Ln
n = 1
(When CFS = 0, m = 256
When CFS = 1, m = 64)
Rev. 1.00 Apr. 28, 2008 Page 229 of 994
REJ09B0452-0100