Hitachi H8S/2633 Hardware Manual page 1143

C.7 Port B Block Diagram
PB1
* 1
* 2
TPU input
(Input capture)
Legend
WDDRB : Write to PBDDR
WDRB : Write to PBDR
WODRB : Write to PBODR
WPCRB : Write to PBPCR
RDRB : Read PBDR
RPORB : Read port B
RODRB : Read PBODR
RPCRB : Read PBPCR
n= 0 to 7
Figure C-7 Port B Block Diagram (Pins PB0 to PB7)
(Output compare)
TPU output
TPU output
enable
Mode 4/5/6
Address
enable
Notes: 1. Output enable signal
2. Open drain control signal
Reset
R
Q D
PBnPCR
C
WPCRB
RPCRB
Reset
R
Q D
PBnDDR
C
WDDRB
Reset
R
Q D
PBnDR
C
WDRB
Reset
R
Q D
PBnODR
C
WODRB
RODRB
RDRB
RPORB
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