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Hitachi H8S/2633 Hardware Manual page 1124

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*
2
P32
*
1
*
3
Legend
WDDR3
: Write to P3DDR
WDR3
: Write to P3DR
WODR3
: Write to P3ODR
RDR3
: Read P3DR
RPOR3
: Read port 3
RODR3
: Read P3ODR
1112
Notes: 1. Priority order: IIC output > Serial clock output > DR output
Figure C-2 (c) Port 3 Block Diagram (Pin P32)
Reset
R
Q
P32DDR
C
WDDR3
Reset
R
Q
P32DR
C
WDR3
Reset
R
Q
P32ODR
C
WODR3
RODR3
RDR3
RPOR3
2. Output enable signal
3. Open drain control signal
D
D
D
IIC1 module
SDA1 output
IIC1 output enable
SDA1 input
SCI module
Serial clock output
enable
Serial clock output
Serial clock input
enable
Serial clock input
Interrupt controller
IRQ4 interrupt input

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