Hitachi H8S/2633 Hardware Manual page 1112

FLPWCR—Flash Memory Power Control Register
Bit :
PDWND
Initial value :
R/W :
R/W
Power-down disable
0 Transition to flash memory power-down mode enabled
1 Transition to flash memory power-down mode disabled
PORT1—Port 1 Register
Bit :
Initial value :
R/W :
Note: * Determined by status of pins P17 to P10.
PORT3—Port 3 Register
Bit :
Initial value :
R/W :
Note: * Determined by status of pins P37 to P30.
1100
7 6
—
0 0
R
7 6
P17 P16
—* —*
R R
7 6
P37 P36
—* —*
R R
H'FFAC
5 4
— —
0 0
R R
H'FFB0
5 4
P15 P14
—* —*
R R
H'FFB2
5 4
P35 P34
—* —*
R R
3 2
— —
0 0
R R
3 2
P13 P12
—* —*
R R
3 2
P33 P32
—* —*
R R
FLASH
1 0
— —
0 0
R R
Port
1 0
P11 P10
—* —*
R R
Port
1 0
P31 P30
—* —*
R R