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Hitachi H8S/2633 Hardware Manual page 1096

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Short address mode
Bit
DTSZ
DMACR
Initial value
Read/Write
R/W
Data Transfer Size
0
Byte-size transfer
1
Word-size transfer
Data Transfer Increment/Decrement
0
MAR is incremented after a data transfer
• When DTSZ = 0, MAR is incremented
by 1 after a transfer
• When DTSZ = 1, MAR is incremented
by 2 after a transfer
1
MAR is decremented after a data transfer
• When DTSZ = 0, MAR is decremented
by 1 after a transfer
• When DTSZ = 1, MAR is decremented
by 2 after a transfer
Repeat Enable
0
0
Transfer in sequential mode (no transfer end interrupt)
1
Transfer in sequential mode (with transfer end interrupt)
1
0
Transfer in repeat mode (no transfer end interrupt)
Transfer in idle mode (with transfer end interrupt)
1
1084
7
6
DTID
RPE
0
0
R/W
R/W
Data Transfer Direction
0
0
Transfer with MAR as source address and IOAR as destination address
1
Transfer with IOAR as source address and MAR as destination address
Transfer with MAR as source address and DACK pin as write strobe
1
0
Transfer with DACK pin as read strobe and MAR as destination address
1
5
4
DTDIR
DTF3
0
0
R/W
R/W
Data Transfer Factor
0
0
0
0
1
1
0
1
1
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
1
1
0
1
3
2
DTF2
DTF1
0
0
R/W
R/W
Channel A
Activated by A/D converter conversion
end interrupt
Activated by DREQ pin
falling edge input
Activated by DREQ pin
low-level input
Activated by SCI channel 0 transmit-data-
empty interrupt
Activated by SCI channel 0 reception
complete interrupt
Activated by SCI channel 1 transmit-data-
empty interrupt
Activated by SCI channel 1 reception
complete interrupt
Activated by TPU channel 0 compare match/
input capture A interrupt
Activated by TPU channel 1 compare match/
input capture A interrupt
Activated by TPU channel 2 compare match/
input capture A interrupt
Activated by TPU channel 3 compare match/
input capture A interrupt
Activated by TPU channel 4 compare match/
input capture A interrupt
Activated by TPU channel 5 compare match/
input capture A interrupt
1
0
DTF0
0
0
R/W
Channel B

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