Hitachi H8S/2633 Hardware Manual page 1132

*
P72
Legend
WDDR7 : Write to P7DDR
WDR7 : Write to P7DR
RDR7 : Read P7DR
RPOR7 : Read port 7
Note: *Priority order: (Mode7)
1120
Mode 7
1
Mode 4 to 6
DMA transfer end output > 8-bit timer output > DR output
(Mode4/5/6)
Chip select output > DMA transfer end output > 8-bit timer output > DR output
Figure C-4 (b) Port 7 Block Diagram (Pin P72)
Reset
R
Q D
P72DDR
C
WDDR7
Reset
R
Q D
P72DR
C
WDR7
Bus controller
Chip select
DMA controller
DMA transfer end enable
DMA transferred
RDR7
8-bit timer
Timer output TMO0
Timer output enable
RPOR7
IIC module
Formatress clock input