Hitachi H8S/2633 Hardware Manual page 1133

*
1
P73
Legend
WDDR7 : Write to P7DDR
WDR7 : Write to P7DR
RDR7 : Read P7DR
RPOR7 : Read port 7
Note: * Priority order: (Mode7)
Mode 7
Mode 4 to 6
DMA transfer end output > 8-bit timer output > DR output
(Mode4/5/6)
Chip select output > DMA transfer end output > 8-bit timer output > DR output
Figure C-4 (c) Port 7 Block Diagram (Pin P73)
Reset
R
Q D
P73DDR
C
WDDR7
Reset
R
Q D
P73DR
C
WDR7
Bus controller
Chip select
DMA controller
DMA transfer end enable
DMA transfer end
RDR7
RPOR7
8-bit timer
Timer output TMO1
Timer output enable
1121