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TIER1—Timer Interrupt Enable Register 1
TIER2—Timer Interrupt Enable Register 2
TIER4—Timer Interrupt Enable Register 4
TIER5—Timer Interrupt Enable Register 5
Channel 1: TIER1
Channel 2: TIER2
Channel 4: TIER4
Channel 5: TIER5
Bit
:
TTGE
Initial value
:
R/W
:
R/W
1062
7
6
—
TCIEU
0
1
—
R/W
Underflow interrupt enable
0
TCFU interrupt request (TCIU) disabled.
1
TCFU interrupt request (TCIU) enabled.
A/D conversion start request enable
0
A/D conversion start request generation disabled.
1
A/D conversion start request generation enabled.
Overflow interrupt enable
0
1
TGR interrupt enable B
0
1
H'FF24
H'FF34
H'FE94
H'FEA4
5
4
TCIEV
—
0
0
R/W
—
TCFV interrupt request (TCIV) disabled.
TCFV interrupt request (TCIV) enabled.
TGFB bit interrupt request (TGIB) disabled.
TGFB bit interrupt request (TGIB) enabled.
TGR interrupt enable A
0
TGFA bit interrupt request (TGIA) disabled.
1
TGFA bit interrupt request (TGIA) enabled.
3
2
—
TGIEB
0
0
—
R/W
TPU1
TPU2
TPU4
TPU5
1
0
TGIEA
0
0
R/W
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