Software Interface; Format Of Register Description; Global Address; Register Summary - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64

20.2 Software Interface

20.2.1

Format of Register Description

The register descriptions in the following sections use the format shown below to describe each bit
field of a register.
Register address
Offset
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Meaning of items and sign
Register address
Register address shows the address (Offset address) of the register.
Bit number
Bit number shows bit position of the register.
Field name
Field name shows bit name of the register.
R/W
R/W shows the read/write attribute of each bit field:
R:
Read
W:
Write
W1C: Writing a value of "1" clears the register.
Reset value
Reset value indicates the value of each bit field immediately after reset.
0:
Initial value is "0".
1:
Initial value is "1".
X:
Undefined.
Unused register fields are marked with a solid grey background.
Bit vectors are unsigned integers, if nothing else specified.
20.2.2

Global Address

For module base address refer to inter-module specification or global address map of the respective
LSI.
20.2.3

Register Summary

Address
Base address + 0
H
20.2.4
Register Description
DitherControl
Register address
BaseAddress + 0
20-4
Register Name
DitherControl
Dither Unit Control
H
Description

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