Fujitsu MB86R02 Jade-D Hardware Manual page 667

Graphics controller

Hide thumbs Also See for MB86R02 Jade-D:

Table of Contents

MB86R02 'Jade-D' Hardware Manual V1.64

X coordinate

Y coordinate

SPG x = Sync Pulse Generator x

SM x = Sync Multiplexer x

Figure 22-4 Block diagram of TSIG

Sync signals are generated using a three stage approach in order to achieve maximum flexibility. In

the first stage, signals are generated which carry positional timing information. Two methods are used

to create these signals. The second stage combines them to form more complex waveforms. The third

stage is used to create a programmable delay of half a pixel clock cycle.

Position Matching

One way to form the first stage signals is to use simple position matching to trigger an RS flip-flop or a

toggle flip-flop. This is done using an array of twelve identical Sync Pulse Generators (SPG's). The