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MB86R02 'Jade-D' Hardware Manual V1.64
8.6.4
INITRAM control
The ARM926EJ-S core has an INITRAM signal. When high at reset, the instruction TCM
automatically becomes valid which enables a reboot operation from ITCM.
Refer to the "Technical reference manual" of the ARM9 core provided by ARM Ltd. for details of
the INITRAM signal.
The RBITRA register is initialized to "0" by CRSTn, however it is not reset by HRESETn. This
means a reboot operation from ITCM can be executed at software reset if the exception vector
table is copied to ITCM before a software reset.
8-9
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