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MB86R02 'Jade-D' Hardware Manual V1.64
Internal CLK
MEM_XCS0
MEM_XCS2
MEM_XCS4
MEM_EA[24:1]
MEM_RDY
MEM_XRD
MEM_ED[31:0]
Figure 34-10 Low speed device Read
Internal CLK
t
cso
MEM_XCS0
MEM_XCS2
MEM_XCS4
t
ao
MEM_EA[24:1]
MEM_RDY
MEM_XWR[1:0]
t
do
MEM_ED[31:0]
Figure 34-11
Low speed device Write
34-18
t
cso
t
ao
Min 2Cycle(Internal CLK) + t
Min 2Cycle(Internal CLK) + t
t
do
X
Min 0[ns]
rdo
t
rdo
Min 0[ns]
wro
t
wro
t
cso
t
ao
t
rdo
t
t
dhr
dsr
t
cso
t
ao
t
wro
t
do
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