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34.4.3
ADC ............................................................................................................................ 34-12
34.4.4
I2C Bus Fast Mode I/O ............................................................................................... 34-14
34.4.4.1
I2C IO V-1 Characteristic Figure ......................................................................... 34-15
34.5
AC Characteristics .......................................................................................................... 34-16
34.5.1
Memory Controller Signal Timing ............................................................................... 34-16
34.5.2
DDR2SDRAM Interface .............................................................................................. 34-20
34.5.2.1
DDR2SDRAM Interface Timing Diagram ............................................................ 34-21
34.5.3
GPIO Signal Timing .................................................................................................... 34-24
34.5.4
PWM Signal Timing .................................................................................................... 34-25
34.5.4.1
Output Signal ....................................................................................................... 34-25
34.5.5
GDC Display Signal Timing ........................................................................................ 34-26
34.5.5.1
Clock .................................................................................................................... 34-26
34.5.5.2
Input Signal .......................................................................................................... 34-26
34.5.5.3
Output Signal ....................................................................................................... 34-28
34.5.6
TCON active Display Timing DISP0 Interface ............................................................ 34-30
34.5.7
RSDS Characteristics ................................................................................................. 34-32
34.5.8
GDC Video Capture Signal Timing ............................................................................. 34-32
34.5.8.1
Clock .................................................................................................................... 34-32
34.5.8.2
Input Signal .......................................................................................................... 34-32
34.5.9
I2S Signal Timing ........................................................................................................ 34-35
34.5.10
UART Signal Timing ................................................................................................ 34-37
34.5.11
I2C Bus Timing ........................................................................................................ 34-38
34.5.12
SPI Signal Timing .................................................................................................... 34-39
34.5.13
CAN Signal Timing .................................................................................................. 34-40
34.5.14
MediaLB Signal Timing ........................................................................................... 34-41
34.5.14.1
MediaLB AC Spec Type A .................................................................................. 34-41
34.5.14.2
MediaLB AC Spec Type B .................................................................................. 34-42
34.5.15
SD Signal Timing .................................................................................................... 34-44
34.5.15.1
Clock ................................................................................................................... 34-44
34.5.15.2
Input/Output Signal ............................................................................................. 34-44
34.5.16
ETM9 Trace Port Signal Timing .............................................................................. 34-46
34.5.17
EXIRC Signal Timing .............................................................................................. 34-47
34.5.18
Apix Characteristics ................................................................................................ 34-48
34.5.18.1
Power supply ...................................................................................................... 34-48
34.5.18.2
Transmitter Drive Current ................................................................................... 34-48
34.5.18.3
Transmitter De-emphasis ................................................................................... 34-49
34.5.18.4
Receiver Input Sensitivity ................................................................................... 34-49
34.5.18.5
Receiver Common Mode .................................................................................... 34-49
34.5.18.6
Transmitter Serial Data Signal Characteristics ................................................... 34-49
34.5.19
OSC Characteristics ................................................................................................ 34-50
34.5.19.1
Power supply ...................................................................................................... 34-50
34.5.19.2
Crystal and Clock buffer Frequencies ................................................................ 34-50
34.5.19.3
Internal Feedback Resistor ................................................................................. 34-50
35
Addendum: Differences ES1 / ES2 ......................................................................................... 35-1
35.1
35.2
Multiplex (2) ...................................................................................................................... 35-1
35.3
PU/PD added.................................................................................................................... 35-2
35.4
SSCG (Spread-Spectrum Modulation) ............................................................................. 35-3
35.5
Polarity of JTAGSEL ........................................................................................................ 35-3
35.6
APIX Initialization ............................................................................................................. 35-3
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