External Pin Status Register (Cex_Pin_St) - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64

7.4.13 External pin status register (CEX_PIN_ST)

Address
Bit 31 30 29
Name (Reserved)
R/W R R R
Initial value 0 0 0
Bit 15 14 13
Name (Reserved)
R/W R R R
Initial value 0 0 0
Bit field
Number Name
31-12 (Reserved)
11-8 CRIPM
7-4 (Reserved)
4 CLK_SEL
3 MPX_MODE_5[1]
2 MPX_MODE_5[0]
1-0 MPX_MODE_1
FFF4_2000 + 34h
28 27 26 25
R R R R
0 0 0 0
12 11 10 9
Res CRIPM[3:0]
R R R R
x x x x
Reserved
Writes are ignored. Reads will return a '0' at all times.
Display the status of PLL multiply number setting pin.
Reserved
Writes are ignored. Reads will return a '0' at all times.
CLKSEL
0 Selects internal oscillator clock
1 Selects clock input from ECLK (external)
MPX_MODE_5[1]
0 UART0 available
1 Memory Controller NAND Flash support available
Display the status of a set pin for external pin multiplex mode #3.
MPX_MODE_5[0]
0 Trace Data[3..0] available
1 PWM[7..4] available
Display the status of a set pin for external pin multiplex modes #0 and # 1.
00 DISP1 and CAP available
01 Memory Controller Extension available (32bit data bus), CAP available
10 DISP1 and Memory Controller Extension available (32bit data bus) available
11 DISP1 and CAP available
24 23 22 21
R R R R
0 0 0 0
8 7 6 5
(Reserved)
R R R R
x 0 0 0
Function
20 19 18 17
R R R R
0 0 0 0
4 3 2 1
MPX_MODE_5 MPX_MODE_1
R R R R
X x x x
16
R
0
0
R
X
7-21