Fujitsu MB86R02 Jade-D Hardware Manual page 429

MB86R02 'Jade-D' Hardware Manual V1.64
Bit31 – 13 Reserved, do not modify
Bit16 MBST (Memory Bust )
This bit selects SDRAM burst length. In general, 32word burst is more efficient.
0:
1:
Bit20 RGBsh ( RGB output shift)
This function is intended for debugging purposes
0:
1:
Bit21 RGBrv ( RGB output reverse)
This function is intended for debugging purposes
0:
1:
Bit22 CSY0 ( CSYNC output zero)
If CSYNC output is connected to external DAC input for sync-on-green, this bit can be
used as sync-on-green disable.
0:
1:
Bit24 VPWMs ( Video sync PWM select)
0:
1:
Bit25 GVD ( GV output delay)
0:
1:
SDRAM burst length is 16word ( 1word=32bit)
SDRAM burst length is 32word ( 1word=32bit)
no shift
shitft RGB output to LSB by 2bit
no reverse
reverse bit order of RGB output
CSYNC singal is valid
CSYNC signal is fixed to zero therefore sync-on-green is disabled. Refer to the
specification of the connected DAC
Disable VPWM signal and select GV signal for GV/VPWM output
Disable GV signal and select VPWM signal for GV/VPWM output
no delay
one clock delay is given to GV output to compensate external DAC.
18-71