Fujitsu MB86R02 Jade-D Hardware Manual page 275

MB86R02 'Jade-D' Hardware Manual V1.64
Bit field
No. Name
24 FD This bit is used to fix destination address.
(Fixed When the address needs to be added after each transfer, "0" must be set to this bit.
Destination)
23 RC This bit is used to control reload function for number of block (DMACA/BC bits) and
(Reload Count) number of transfer (DMACA/TC bits.)
When "1" is set to this bit, DMACA/BC and DMACA/TC are set to the initial value after
DMA transfer.
22 RS This bit is used to control reload function of source address (DMACSA.)
(Reload "1" is set to this bit: DMACSA is set to the initial value after DMA transfer
Source) "0" is set to this bit: DMAC sets the next source address to DMACSA after DMA transfer
21 RD This bit is used to control reload function of destination address (DMACDA.)
(Reload "1" is set to this bit: DMACDA is set to the initial value after DMA transfer
Destination) "0" is set to this bit: DMAC sets the next destination address to DMACDA after DMA
20 EI This bit is used to control issuing interrupt (DIRQ) caused by error.
(Error Interrupt) When this bit is set to "1", error interrupt is issued by the following transfer errors.
•
•
•
•
19 CI This bit is used to control issuing interrupt (DIRQ) caused by completion of transfer.
(Completion When this bit is set to "1", completion interrupt is issued after DMA is transferred
Interrupt) properly.
15-12
FD
0(h) Destination address is incremented (initial value)
1(h) The destination address is fixed
RC
0(h) Reload function for number of transfer is disabled (initial
value)
1(h) Reload function for number of transfer is enabled
RS
0(h) Reload function of source address is disabled (initial value)
1(h) Reload function of source address is enabled
transfer
RD
0(h) Reload function of destination address is disabled (initial value)
1(h) Reload function of destination address is enabled
Address overflow
Transfer stop request from DSTP and IDSTP, or transfer disable with EB or DE bit
Source access error
Destination access error
EI
0(h) Error interrupt issue is disabled (initial value)
1(h) Error interrupt issue is enabled
CI
0(h) Completion interrupt is disabled (initial value)
1(h) Completion interrupt is enabled
Description
Function
Function
Function
Function
Function
Function