Dma Start In All Channels (In Demand Transfer Mode) - Fujitsu MB86R02 Jade-D Hardware Manual

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MB86R02 'Jade-D' Hardware Manual V1.64

Example of demand transfer by software request (with DMAC ch0)

(1) Set DMA configuration register

DMACR ← 0x80 (byte writing)

(2) Set DMAC source address register

DMACSA0 ← 0x0100_8000

(3) Set DMAC destination address register

DMACDA0 ← 0xFFFE_1000

(4) Set DMA configuration B register

DMACB0 ← 0x2108_0000

(5) Set DMA configuration A register

DMACA0 ← 0x9000_000A

Start DMA transfer

Remark: Setting order of step 1 ~ 5 is arbitrary; however, the last setting should be step 1 or 5.

• DMA configuration register (DMACR) should be set by byte writes.

15.8.2 DMA start in all channels (in demand transfer mode)

All channels are able to start simultaneously by setting the DMACR register after setting all DMA

channel registers in demand transfer mode. In this case, the DMAC priority controller receives a

request from all channels at the same time, and then transfer starts by selecting the channel

according to the DMA channel priority, which is configurable using the PR bit of the DMACR.

DMA transfer is enabled.

Source address is set.

Destination address is set.

Transfer mode, transfer data width, and completion

interrupt is set.

DMA channel transfer control, software trigger, and

number of block and transfer are set.