Table of Contents
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MB86R02 'Jade-D' Hardware Manual V1.64
25.1
Outline .............................................................................................................................. 25-1
25.2
Feature ............................................................................................................................. 25-1
25.3
Block diagram ................................................................................................................... 25-2
25.4
Related pins ...................................................................................................................... 25-2
25.5
Clock Supply ..................................................................................................................... 25-2
25.6
Interrupts .......................................................................................................................... 25-2
25.7
Registers .......................................................................................................................... 25-3
25.7.1
Register list ................................................................................................................... 25-3
25.7.2
PWMx base clock register (PWMxBCR) ...................................................................... 25-5
25.7.3
PWMx pulse width register (PWMxTPR) ...................................................................... 25-6
25.7.4
PWMx phase register (PWMxPR) ................................................................................ 25-7
25.7.5
PWMx duty register (PWMxDR) ................................................................................... 25-8
25.7.6
PWMx status register (PWMxCR) ................................................................................ 25-9
25.7.7
PWMx start register (PWMxSR) ................................................................................. 25-10
25.7.8
PWMx current count register (PWMxCCR) ................................................................ 25-11
25.7.9
PWMx interrupt register (PWMxIR) ............................................................................ 25-12
25.8
Example of setting a register .......................................................................................... 25-13
26
A/D Converter .......................................................................................................................... 26-1
26.1
Outline .............................................................................................................................. 26-1
26.2
Features ........................................................................................................................... 26-1
26.3
Block diagram ................................................................................................................... 26-2
26.4
Related pins ...................................................................................................................... 26-2
26.5
Supply clock ..................................................................................................................... 26-2
26.6
Channel mapping table .................................................................................................... 26-3
26.7
Output truth value list ....................................................................................................... 26-3
26.8
Analog pin equivalent circuit ............................................................................................. 26-4
26.9
Registers .......................................................................................................................... 26-5
26.9.1
Register list ................................................................................................................... 26-5
26.9.2
Format of Register Descriptions ................................................................................... 26-6
26.9.3
ADCx data register (ADCxDATA) ................................................................................. 26-7
26.9.4
ADCx mode register (ADCxMODE) .............................................................................. 26-7
26.9.5
ADCx power down control register (ADCxXPD) ........................................................... 26-7
26.9.6
ADCx clock selection register (ADCxCKSEL) .............................................................. 26-8
26.9.7
ADCx status register (ADCxSTATUS) ........................................................................ 26-10
26.10
Basic operation flow ....................................................................................................... 26-11
27
Serial Audio Interface (I2S) ..................................................................................................... 27-1
27.1
Outline .............................................................................................................................. 27-1
27.2
Features ........................................................................................................................... 27-1
27.3
Block diagram ................................................................................................................... 27-2
27.4
Related pins ...................................................................................................................... 27-3
27.5
Supply clock ..................................................................................................................... 27-3
27.6
Registers .......................................................................................................................... 27-4
27.6.1
Register list ................................................................................................................... 27-4
27.6.2
Description format of registers ...................................................................................... 27-5
27.6.3
I2SxRXFDAT register ................................................................................................... 27-6
27.6.4
I2SxTXFDAT register .................................................................................................... 27-7
27.6.5
I2SxCNTREG register .................................................................................................. 27-8
27.6.6
I2SxMCR0REG register .............................................................................................. 27-11
27.6.7
I2SxMCR1REG register .............................................................................................. 27-12
27.6.8
I2SxMCR2REG register .............................................................................................. 27-13
27.6.9
I2SxOPRREG register ................................................................................................ 27-14
27.6.10
I2SxSRST register .................................................................................................. 27-15
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