Block Diagram; Supply Clock - Fujitsu MB86R02 Jade-D Hardware Manual

MB86R02 'Jade-D' Hardware Manual V1.64

10.3 Block diagram

Figure 10-1 shows block diagram of EXIRC.
EXIRC (External Interrupt Controller)
APB bus
INT_A[0]
INT_A[1]
INT_A[2]
INT_A[3]
Figure 10-1 Block diagram of EXIRC
Table 10-1 shows block function included in EXIRC.
Table 10-1 Block function included in EXIRC
Block
EI_ENABLE
EI_LEVEL
EI_REQUEST
EI_DOUT

10.4 Supply clock

APB clock is supplied to EXIRC. Refer to "5. Clock reset generator (CRG)" for frequency setting
and control specification of the clock.
10-2
EI_ENABLE
EI_LEVEL
EI_REQUEST 0
EI_REQUEST 1
EI_REQUEST 2
EI_REQUEST 3
Enabling external interrupt request for interrupt controller (IRC0)
Setting input request level: "H" level/"L" level/rising edge/falling edge
Synchronizing and maintaining interrupt request
Generating data for reading
IRQ10
IRQ11
IRQ12
IRQ13
Function