Fujitsu MB86R02 Jade-D Hardware Manual page 120

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MB86R02 'Jade-D' Hardware Manual V1.64
(Jade_D Plus version only) CNT_AVERAGE: 0 = non calculate average, 1 = calculate average e.g. for MULTIPLE = 2 (AVERAGE = 0
SSCG_OUTFREQ = h8023, AVERAGE = 1 SSCG_OUTFREQ = h2008)
Bit 0
SSCG_CNTREPEAT
CNTREPEAT: 0 = one measurement, 1 = continuous measurement
SSCG_COUNT_TRIG
Register address
BaseAddress + 34
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Field name
R/W
Reset value
Trigger to start a measurement
Bit 0
SSCG_CNTTRIG
Used for debugging: write 1 to trigger a measurement (if sscg_cntrepeat=0)
SSCG_CNTOUTFREQ
Register address
BaseAddress + 44
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field name
R/W
Reset value
Measurement result : Build average if SSCG_CNT_AVERAGE = 1
Bit 24 - 0
SSCG_OUTFREQ
Used for debugging: Measured output clock count
SSCG_RESET_CTRL
Register address
BaseAddress + 48
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Field name
R/W
Reset value
Software Reset
Bit 15 -
SWreset_delay
8
0= normal operation, 1=Software reset. SSCG is reset during SSCG_SWreset=1 plus SWreset_delay * 8 of PLL clock (by default:
SSCG_SWreset=1 + 8*128 PLL clock)
Bit 0
SSCG_SWreset
0= normal operation, 1=Software reset. SSCG is reset during SSCG_SWreset=1 plus SWreset_delay * 8 of PLL clock
H
H
H
SSCG_OUTFREQ
R
0
H
SWreset_delay
RW
80
H
.
0
SSCG_CNTTRIG
W
0
H
0
SSCG_SWreset
RW
0
H
6-7

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